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Desarrollo de un entorno hardware para la ejecución de aplicaciones de propósito general sobre FPGAs

Sánchez Conde, Laura and Sánchez Delgado, Raquel and Valero Martín, Jose Antonio (2006) Desarrollo de un entorno hardware para la ejecución de aplicaciones de propósito general sobre FPGAs. [Coursework] (Unpublished)

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Abstract

El hardware dinámicamente reconfigurable ofrece la posibilidad de dar a un único
dispositivo hardware cualquier tipo de funcionalidad deseada por el usuario. Esto por
ejemplo permitiría que nuestro dispositivo fuese hoy una calculadora y mañana un
potente microprocesador.
Existen varios tipos de dispositivos hardware dinámicamente reconfigurables de
entre los cuales nosotros utilizaremos las FPGAs.
La forma de trabajar con las FPGAs es diseñar mediante herramientas software un
circuito hardware, transformarlo en un mapa de bits que es la representación física del
circuito dentro de la FPGA y por último cargar dicho mapa de bits en la propia FPGA.
Una vez hecho esto la FPGA se comportará de la misma forma que el circuito que se
diseñó.
Nuestro proyecto consiste en ir un paso más allá del modo de funcionamiento
normal de este tipo de dispositivos, ya no se tratará de cargar un único circuito en la
FPGA sino que podremos tener varios circuitos diferentes almacenados de manera
externa y el usuario podrá elegir cual es el que quiere ejecutar en cada momento.
Para que el usuario del sistema pueda elegir la tarea que desea ejecutar en cada
momento hemos desarrollado un entorno sobre el cual se pueden introducir las órdenes
por teclado y visualizar los resultados obtenidos en un monitor.
El entorno permite la carga y ejecución de hasta cuatro tareas de manera simultánea
e independiente aunque el usuario tiene la posibilidad de lanzar todas las que desee en
cualquier momento.
Las tareas cargadas permanecerán en ejecución hasta que finalicen, por lo que si el
usuario lanzara más de cuatro tareas, éstas quedarán a la espera de que alguna de las que
haya en ejecución termine, liberando así su zona de trabajo y permitiendo que una
nueva tarea pase a ejecución.
El proceso consistente en cargar varias tareas sobre una misma FPGA en cualquier
momento y sin que tengan porqué interferir al funcionamiento del resto, es la
denominada reconfiguración parcial. Esta reconfiguración parcial es una técnica
desarrollada recientemente que permite no sólo que un sistema varíe su comportamiento
a lo largo del tiempo, de manera aleatoria o por voluntad de un usuario, sino que podría
darse el caso de que el propio sistema sea capaz de determinar cual de sus partes no está
siendo utilizada en un determinado momento, pudiendo así desactivarlos para ahorrar
energía o disminuir la temperatura global del sistema. De forma contraria, también
podría decidir si necesita más recursos de un cierto tipo, bien sea duplicando alguno ya
existente o bien cargando un módulo nuevo que permita resolver el problema en un
menor tiempo o con una mayor eficiencia o complejidad.
[ABSTRACT]
The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.The dynamically reconfigurable hardware offers the possibility that a hardware
device changes its functionality depending on the user requirements. This for example
would allow that our device was today a calculator and tomorrow a powerful
microprocessor.
There are many types of dynamically reconfigurable hardware devices and we will
use the FPGAs.
The way to work with the FPGAs consists in the design with software tools of a
hardware circuit, to transform it in a bit map that is the physical representation of the
circuit within the FPGA and finally to load this bit map in the configuration memory of
the FPGA. Then the FPGA will behave like the circuit designed.
Our project tries to go far away of the normal function mode of this type of devices.
The idea is to have several stored circuits and the user will be able to choose the circuit
that he wants to execute at every moment.
In this way we have developed an environment on which the user can write
commands using the keyboard and the system shows the results in a monitor.
The environment allows the user to load and run simultaneous a maximum of four
tasks. However the user has the possibility of throws all the tasks that he wants in any
moment.
The loaded tasks will remain in execution until they finalize. Then if the user
throws more than four tasks, these tasks will be stopped until any task in execution
finishes, allowing a new task to start the execution.
The process of loading several tasks on a same FPGA, in any moment and without
they have to interfere to the operation of the other, it is the denominated partial
reconfiguration. This partial reconfiguration is a technique recently developed that
allows a system to change its behaviour throughout the time. It is also possible that the
system would determine which of its parts is not being used at a certain moment, in that
case the system would deactivate them to save energy or to diminish the globe
temperature of the system. By opposite, the system also can decide if it needs more
resources of a type and in that case it can duplicate one of the existing or load a new
module that allows to solver the problem in a smaller time or with a greater efficiency
or complexity.


Item Type:Coursework
Additional Information:

Trabajo de la asignatura Sistemas Informáticos (Facultad de Informática, Curso 2005-2006)

Uncontrolled Keywords:FPGA, VHDL, Reconfiguración, DDR, Xilinx, Virtex, VGA,DCM
Subjects:Sciences > Computer science > Expert systems (Computer science)
ID Code:9032
Deposited On:01 Jun 2009 11:04
Last Modified:06 Feb 2014 08:18

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