Biblioteca de la Universidad Complutense de Madrid

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Número de eprints: 23.

Fabero Jiménez, Juan Carlos y Mendías Cuadros, José Manuel y Mecha López, Hortensia y González Calvo, Carlos y Clemente Barreira, Juan Antonio (2015) Diseño y desarrollo de una placa de periféricos no convencionales para incentivar el aprendizaje autónomo sobre sistemas empotrados basados en FPGA y SoC ARM. [Proyecto de Innovación Docente]

Clemente Barreira, Juan Antonio y Resano, Javier y González Calvo, Carlos y Mozos Muñoz, Daniel (2011) A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19 (7). pp. 1263-1276. ISSN 1063-8210

Clemente Barreira, Juan Antonio y González, Carlos y Resano, Javier y Mozos Muñoz, Daniel (2008) A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. In Reconfigurable Computing and FPGAs, 2008. ReConFig '08. International Conference on, 3-5 Dec. 2008.

Clemente Barreira, Juan Antonio y Beretta, Ivan y Rana, Vincenzo y Atienza, David y Sciuto, Donatella (2014) A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7 (2). ISSN 1936-7406

Serrano, Felipe y Clemente Barreira, Juan Antonio y Mecha López, Hortensia (2015) A Methodology to Emulate Single Event Upsets in Flip-Flops using FPGAs through Partial Reconfiguration and Instrumentation. IEEE Transactions on Nuclear Science, 62 (4). pp. 1617-1624. ISSN 0018-9499

Clemente Barreira, Juan Antonio y Mozos Muñoz, Daniel y Resano, Javier (2011) A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. In Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on, 16-20 May 2011.

Serrano, Felipe y Clemente Barreira, Juan Antonio y Mecha López, Hortensia (2014) A Study of the Robustness Against SEUs of Digital Circuits Implemented with FPGA DSPs. In Radiation and Its Effects on Components and Systems (RADECS), 2013 14th European Conference on, 23-27 Sept. 2013.

Clemente Barreira, Juan Antonio y González Calvo, Carlos y Resano, Javier y Mozos Muñoz, Daniel (2010) A Task-Graph Execution Manager for Reconfigurable Multi-tasking Systems. Microprocessors and Microsystems, 34 (2-4). pp. 73-83. ISSN 0141-9331

Clemente Barreira, Juan Antonio y Resano, Javier y Mozos Muñoz, Daniel (2014) An Approach to Manage Reconfigurations and Reduce Area Cost in Hard Real-Time Reconfigurable Systems. ACM Transactions on Embedded Computing Systems (TECS), 13 (4). 90:1-90:24. ISSN 1539-9087

Clemente Barreira, Juan Antonio y Pérez Ramo, Elena y Resano, Javier y Mozos Muñoz, Daniel y Catthoor, Francky (2014) Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 22 (6). pp. 1248-1261. ISSN 1063-8210

Ramos, Pablo y Vargas Vallejo, Vanessa Carolina y Baylac, Maud y Villa, Francesca y Rey, Solenne y Clemente Barreira, Juan Antonio y Zergainoh, Nacer-Eddine y Méhaut, Jean-François (2016) Evaluating the SEE sensitivity of a 45nm SOI Multi-core Processor due to 14 MeV Neutrons. IEEE Transactions on Nuclear Science, 63 (4). pp. 2193-2200. ISSN 0018-9499

Velazco, Raoul y Clemente Barreira, Juan Antonio y Hubert, Guillaume y Mansour, Wassim y Palomar Trives, Carlos y Franco Peláez, Francisco Javier y Baylac, Maud y Rey, Solenne y Rosetto, Olivier y Villa, Francesca (2014) Evidence of the robustness of a COTS soft-error free SRAM to neutron radiation. IEEE transactions on nuclear science, 61 (6). pp. 3103-3108. ISSN 0018-9499

Resano, Javier y Clemente Barreira, Juan Antonio y González, Carlos y García, José Luis y Mozos Muñoz, Daniel (2007) HW implementation of an execution manager for reconfigurable systems. In ERSA’2007 The International Conference on Engineering of Reconfigurable Systems and Algorithms, June 25 - 28, 2007, Las Vegas, Nevada, USA.

Clemente Barreira, Juan Antonio y Gran, Rubén y Chocano Gómez, Abel y Prado, Carlos del y Resano, Javier (2015) Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, PP (99). ISSN 1063-8210

Clemente Barreira, Juan Antonio y Mansour, Wassim y Ayoubi, Rafic y Serrano, Felipe y Mecha López, Hortensia y Ziade, Haissam y El Falou, Wassim y Velazco, Raoul (2016) Hardware Implementation of a Fault-Tolerant Hopfield Neural Network on FPGAs. Neurocomputing, 171 . pp. 1606-1609. ISSN 0925-2312

Clemente Barreira, Juan Antonio y García Casado, José Luis y González Calvo, Carlos (2007) Implementación HW de un gestor de ejecución para sistemas dinámicamente reconfigurables. [Trabajo de curso] (No publicado)

Clemente Barreira, Juan Antonio y Sánchez-Elez Martín, Marcos (2014) Introduction to VHDL programming. [Materiales de enseñanza] (No publicado)

Clemente Barreira, Juan Antonio y Franco Peláez, Francisco Javier y Vila, Francesca y Baylac, Maud y Ramos Vargas, Pablo Francisco y Vargas Vallejo, Vanessa Carolina y Mecha López, Hortensia y Agapito Serrano, Juan Andrés y Velazco, Raoul (2015) Neutron-Induced single events in a COTS soft-error free SRAM at low bias voltage. In 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS) 2015. IEEE-Inst Electrical Electronics Engineers Inc, pp. 162-165. ISBN 978-1-5090-0232-0

Clemente Barreira , Juan Antonio (2008) Planificación de grafos de tareas para sistemas multi-proceso dinámicamente reconfigurables. [Trabajo Fin de Máster]

Clemente Barreira, Juan Antonio y Franco Peláez, Francisco Javier y Villa, Francesca y Baylac, Maud y Ramos Vargas, Pablo Francisco y Vargas Vallejo, Vanessa Carolina y Mecha López, Hortensia y Agapito Serrano, Juan Andrés y Velazco, Raoul (2016) Single Events in a COTS Soft-Error Free SRAM at Low Bias Voltage Induced by 15-MeV Neutrons. IEEE Transactions on Nuclear Science, 63 (4). pp. 2072-2079. ISSN 0018-9499

Clemente Barreira, Juan Antonio y Franco Peláez, Francisco J. y Villa, Francesca y Baylac, Maud y Rey, Solenne y Mecha López, Hortensia y Agapito Serrano, Juan Andrés y Puchner, Helmut y Hubert, Guillaume y Velazco, Raoul (2016) Statistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs. IEEE Transactions on Nuclear Science, 63 (4). pp. 2087-2094. ISSN 0018-9499

Clemente Barreira, Juan Antonio y Franco Peláez, Francisco Javier y Villa, Francesca y Rey, Sole y Baylac, Maud y Mecha López, Hortensia y Agapito Serrano, Juan Andrés y Puchner, Helmut y Hubert, Guillaume y Velazco, Raoul (2015) Statistical anomalies of bitflips in SRAMs to discriminate MCUs from SEUs. In 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS) 2015. IEEE-Inst Electrical Electronics Engineers Inc, pp. 507-510. ISBN 978-1-5090-0232-0

Clemente Barreira, Juan Antonio (2011) Técnicas de planificación en entornos reconfigurables para aplicaciones multimedia (Scheduling techniques in reconfigurable environments for multimedia applications). [Tesis Doctoral]

Esta lista fue generada el Fri Dec 9 02:32:59 2016 CET.