Complutense University Library

IndexAuthor

Up a level
Export as [feed] Atom [feed] RSS 1.0 [feed] RSS 2.0
Number of items: 15.

Fabero Jiménez, Juan Carlos and Mendías Cuadros, José Manuel and Mecha López, Hortensia and González Calvo, Carlos and Clemente Barreira, Juan Antonio (2015) Diseño y desarrollo de una placa de periféricos no convencionales para incentivar el aprendizaje autónomo sobre sistemas empotrados basados en FPGA y SoC ARM. [Proyecto de Innovación Docente]

Serrano, Felipe and Clemente Barreira, Juan Antonio and Mecha López, Hortensia (2015) A Methodology to Emulate Single Event Upsets in Flip-Flops using FPGAs through Partial Reconfiguration and Instrumentation. IEEE Transactions on Nuclear Science, 62 (4). pp. 1617-1624. ISSN 0018-9499

Clemente Barreira, Juan Antonio and Pérez Ramo, Elena and Resano, Javier and Mozos Muñoz, Daniel and Catthoor, Francky (2014) Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 22 (6). pp. 1248-1261. ISSN 1063-8210

Ramos, Pablo and Vargas Vallejo, Vanessa Carolina and Baylac, Maud and Villa, Francesca and Rey, Solenne and Clemente Barreira, Juan Antonio and Zergainoh, Nacer-Eddine and Méhaut, Jean-François (2016) Evaluating the SEE sensitivity of a 45nm SOI Multi-core Processor due to 14 MeV Neutrons. IEEE Transactions on Nuclear Science, 63 (4). pp. 2193-2200. ISSN 0018-9499

Velazco, Raoul and Clemente Barreira, Juan Antonio and Hubert, Guillaume and Mansour, Wassim and Palomar Trives, Carlos and Franco Peláez, Francisco Javier and Baylac, Maud and Rey, Solenne and Rosetto, Olivier and Villa, Francesca (2014) Evidence of the robustness of a COTS soft-error free SRAM to neutron radiation. IEEE transactions on nuclear science, 61 (6). pp. 3103-3108. ISSN 0018-9499

Clemente Barreira, Juan Antonio and Gran, Rubén and Chocano Gómez, Abel and Prado, Carlos del and Resano, Javier (2015) Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, PP (99). ISSN 1063-8210

Clemente Barreira, Juan Antonio and Mansour, Wassim and Ayoubi, Rafic and Serrano, Felipe and Mecha López, Hortensia and Ziade, Haissam and El Falou, Wassim and Velazco, Raoul (2016) Hardware Implementation of a Fault-Tolerant Hopfield Neural Network on FPGAs. Neurocomputing, 171 . pp. 1606-1609. ISSN 0925-2312

Clemente Barreira, Juan Antonio and García Casado, José Luis and González Calvo, Carlos (2007) Implementación HW de un gestor de ejecución para sistemas dinámicamente reconfigurables. [Coursework] (Unpublished)

Clemente Barreira, Juan Antonio and Sánchez-Elez Martín, Marcos (2014) Introduction to VHDL programming. [Teaching Resource] (Unpublished)

Clemente Barreira, Juan Antonio and Franco Peláez, Francisco Javier and Vila, Francesca and Baylac, Maud and Ramos Vargas, Pablo Francisco and Vargas Vallejo, Vanessa Carolina and Mecha López, Hortensia and Agapito Serrano, Juan Andrés and Velazco, Raoul (2015) Neutron-Induced single events in a COTS soft-error free SRAM at low bias voltage. In 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS) 2015. IEEE-Inst Electrical Electronics Engineers Inc, pp. 162-165. ISBN 978-1-5090-0232-0

Clemente Barreira , Juan Antonio (2008) Planificación de grafos de tareas para sistemas multi-proceso dinámicamente reconfigurables. [Trabajo Fin de Máster]

Clemente Barreira, Juan Antonio and Franco Peláez, Francisco Javier and Villa, Francesca and Baylac, Maud and Ramos Vargas, Pablo Francisco and Vargas Vallejo, Vanessa Carolina and Mecha López, Hortensia and Agapito Serrano, Juan Andrés and Velazco, Raoul (2016) Single Events in a COTS Soft-Error Free SRAM at Low Bias Voltage Induced by 15-MeV Neutrons. IEEE Transactions on Nuclear Science, 63 (4). pp. 2072-2079. ISSN 0018-9499

Clemente Barreira, Juan Antonio and Franco, Francisco J. and Villa, Francesca and Baylac, Maud and Rey, Solenne and Mecha López, Hortensia and Agapito Serrano, Juan Andrés and Puchner, Helmut and Hubert, Guillaume and Velazco, Raoul (2016) Statistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs. IEEE Transactions on Nuclear Science, 63 (4). pp. 2087-2094. ISSN 0018-9499

Clemente Barreira, Juan Antonio and Franco Peláez, Francisco Javier and Villa, Francesca and Rey, Sole and Baylac, Maud and Mecha López, Hortensia and Agapito Serrano, Juan Andrés and Puchner, Helmut and Hubert, Guillaume and Velazco, Raoul (2015) Statistical anomalies of bitflips in SRAMs to discriminate MCUs from SEUs. In 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS) 2015. IEEE-Inst Electrical Electronics Engineers Inc, pp. 507-510. ISBN 978-1-5090-0232-0

Clemente Barreira, Juan Antonio (2011) Técnicas de planificación en entornos reconfigurables para aplicaciones multimedia (Scheduling techniques in reconfigurable environments for multimedia applications). [Thesis]

This list was generated on Sat Sep 24 03:33:14 2016 CEST.