Publication: Evaluación del rendimiento de un planificador de tareas sobre una plataforma heterogénea ARM+DSP de Texas Instruments
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2016
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Abstract
El presente trabajo estudia la viabilidad a la hora de aplicar un modelo de programación basado en la extracción de paralelismo a nivel de tareas sobre distintas arquitecturas heterogéneas basadas en un procesador multinúcleo de propósito general acelerado con uno o más aceleradores hardware. Se ha implementado una aplicación completa cuyo objetivo es la detección de bordes en una imagen (implementando el Algoritmo de Canny), y se ha evaluado en detalle su rendimiento sobre distintos tipos de arquitecturas, incluyendo CPUs multinúcleo de última generación, sistemas multi-GPU y una arquitectura objetivo basada en procesadores ARM Cortex-A15 acelerados mediante un DSP C66x de la compañía Texas Instruments. Los resultados experimentales demuestran la viabilidad de este tipo de implementación también para arquitecturas heterogéneas novedosas como esta última, e ilustran la facilidad de programación que introduce este tipo de modelos de programación sobre arquitecturas de propósito específico.
This work studies the possibility of applying programming models based on the extraction of task parallelism on different heterogeneous architectures based on multi-core processors accelerated with one or more hardware accelerators. We have implemented a complete application for edge detection (Canny Algorithm), and we have evaluated in detail the performance on different architectures, including novel multi-core CPUs, systems equipped with multiple GPUs and a target architecture based on ARM Cortex-A15 processors accelerated through a C66x DSP manufactured by Texas Instruments. The expermiental results validate the usage of the aforementioned programming models also for novel heterogeneous architectures, and illustrate the ease of programming introduced by this kind of programming models on specific-purpose architectures.
This work studies the possibility of applying programming models based on the extraction of task parallelism on different heterogeneous architectures based on multi-core processors accelerated with one or more hardware accelerators. We have implemented a complete application for edge detection (Canny Algorithm), and we have evaluated in detail the performance on different architectures, including novel multi-core CPUs, systems equipped with multiple GPUs and a target architecture based on ARM Cortex-A15 processors accelerated through a C66x DSP manufactured by Texas Instruments. The expermiental results validate the usage of the aforementioned programming models also for novel heterogeneous architectures, and illustrate the ease of programming introduced by this kind of programming models on specific-purpose architectures.
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Trabajo de Fin de Grado en Ingeniería de Computadores (Universidad Complutense, Facultad de Informática, curso 2015/2016)