Universidad Complutense de Madrid
E-Prints Complutense

A Study of the Robustness Against SEUs of Digital Circuits Implemented with FPGA DSPs



Downloads per month over past year

Serrano, Felipe and Clemente Barreira, Juan Antonio and Mecha López, Hortensia (2014) A Study of the Robustness Against SEUs of Digital Circuits Implemented with FPGA DSPs. In Radiation and Its Effects on Components and Systems (RADECS), 2013 14th European Conference on, 23-27 Sept. 2013.


Official URL: http://dx.doi.org/10.1109/RADECS.2013.6937459


In this paper we present an experimental validation of the reliability increase of digital circuits implemented in XilinxTMFPGAs when they are implemented using the DSPs (Digital Signal Processors) that are available in the reconfigurable device. For this purpose, we have used a fault-injection platform developed by our research group, NESSY [1]. The presented experiments demonstrate that the probability of occurrence of a SEU effect is similar both in the circuits implemented with and without using embedded DSPs. However, the former are more efficient in terms of area usage, which leads to a decrease in the probability of a SEU occurrence.

Item Type:Conference or Workshop Item (Lecture)
Additional Information:

© © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

Uncontrolled Keywords:Field programmable gate arrays, Digital signal processing, Circuit faults, Robustness, Digital circuits, Single event upsets, Emulation
Subjects:Sciences > Computer science > Hardware
ID Code:39514
Deposited On:19 Oct 2016 10:07
Last Modified:19 Oct 2016 10:53

Origin of downloads

Repository Staff Only: item control page