Improving Circuit Performance with Multispeculative Additive Trees in High-Level Synthesis


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Barrio García, Alberto Antonio Del and Hermida Correa, Román and Ogrenci Memik, Seda and Mendías Cuadros, José Manuel and Molina Prego, María del Carmen (2014) Improving Circuit Performance with Multispeculative Additive Trees in High-Level Synthesis. Microelectronics Journal, 45 (11). pp. 1470-1479. ISSN 0026-2692

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The recent introduction of Variable Latency Functional Units (VLFUs) has broadened the design space of HighLevel Synthesis (HLS). Nevertheless their use is restricted to only few operators in the datapaths because the number of cases to control grows exponentially. In this work an instance of VLFUs is described, and based on its structure, the average latency of tree structures is improved. Multispeculative Functional Units (MSFUs) are arithmetic Functional Units that operate using several predictors for the carry signal. In spite of utilizing more than a predictor, none or only one additional very short cycle is enough for producing the correct result in the majority of the cases. In this paper our proposal takes advantage of multispeculation in order to increase the performance of tree structures with a negligible area penalty. By judiciously introducing these structures into computation trees, it will only be necessary to predict the carry signals in certain selected nodes, thus minimizing the total number of predictions and the number of operations that can potentially mispredict. Hence, the average latency will be diminished and thus performance will be increased. Our experiments show that it is possible to improve 26% execution time. Furthermore, our flow outperforms previous approaches with Speculative FUs.

Item Type:Article
Uncontrolled Keywords:Variable-Latency Functional Units, speculation, additive operation trees, High-Level Synthesis
Subjects:Sciences > Computer science
Sciences > Computer science > Integrated circuits
ID Code:31011
Deposited On:19 Jun 2015 11:52
Last Modified:25 Jun 2015 10:06

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