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Clemente Barreira, Juan Antonio and Franco Peláez, Francisco Javier and Villa, Francesca and Baylac, Maud and Ramos Vargas, Pablo Francisco and Vargas Vallejo, Vanessa Carolina and Mecha López, Hortensia and Agapito Serrano, Juan Andrés and Velazco, Raoul (2016) Single Events in a COTS Soft-Error Free SRAM at Low Bias Voltage Induced by 15-MeV Neutrons. IEEE Transactions on Nuclear Science, 63 (4). pp. 2072-2079. ISSN 0018-9499
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Official URL: http://dx.doi.org/10.1109/TNS.2016.2522819
Abstract
This paper presents an experimental study of the sensitivity to 15-MeV neutrons of Advanced Low Power SRAMs (A-LPSRAM) at low bias voltage little above the threshold value that allows the retention of data. This family of memories is characterized by a 3D structure to minimize the area penalty and to cope with latchups, as well as by the presence of integrated capacitors to hinder the occurrence of single event upsets. In low voltage static tests, classical single event upsets were a minor source of errors, but other unexpected phenomena such as clusters of bitflips and hard errors turned out to be the origin of hundreds of bitflips. Besides, errors were not observed in dynamic tests at nominal voltage. This behavior is clearly different than that of standard bulk CMOS SRAMs, where thousands of errors have been reported.
Item Type: | Article |
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Additional Information: | © IEEE-Inst Electrical Electronics Engineers. |
Uncontrolled Keywords: | COTS; LPSRAM; Neutron tests; radiation hardness; reliability; soft error; SRAM; CMOS integrated; Power supplies; Random access memory |
Palabras clave (otros idiomas): | |
Subjects: | Sciences > Physics > Electronics Sciences > Physics > Computers Sciences > Physics > Radioactivity Sciences > Computer science > Electronics |
ID Code: | 35304 |
Deposited On: | 29 Aug 2016 12:27 |
Last Modified: | 10 Dec 2018 14:57 |
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